Archive for category: PCB production
Soldermask on via holes
There are 3 ways our customers prepare their layouts with respect to covering via-holes with soldermask:
As necessary background information we need to briefly introduce you into the technology of applying soldermask to the boards.
- First we cover the whole surface of the production panel with soldermask ink and then dry the panel (printing the soldermask)
- The ink we use is a UV sensitive material. When exposed to UV-light, the ink will harden (exposing the soldermask)
- Ink that is not exposed remains soft and can be washed away using a 1% alkalic solution (developing the soldermask)
The easiest production method is to have all vias open from both sides. The vias will be clean. They will not contain any contamination nor soldermask. The next picture shows vias free of soldermask. We did not expose the soldermask on the via pads so that it remains soft and is washed away during the developing process.
Another practical production method is where the vias are covered on both sides of the PCB. We expose the soldermask on both sides of the via-pad and via-hole so it will harden and stay on the via-pad and over the via-hole to close it. There is a risk however that (mostly in case of via-holes with a larger diameter) the via-hole is not completely covered and a small opening remains in the middle.
There is a danger that chemicals get stuck in these small openings during the processes that follow after the soldermask application. These chemical can contaminate and affect for instance the chemical Ni/Au process. A further danger exists that chemicals of the Ni/Au process remain in these openings and as they are agressive chemicals they might keep on reacting in the via hole years after the board has been produced causing possible failures in usage of the PCB in its application.
The third case (vias covered from one side and open from the other side of the PCB) is the most problematic in production. This design creates a pocket. We expose the soldermask from one side but not from the other side. This soldermask in the middle of the via-hole will only be half polymerised. During the baking process this material can come out of the hole from the open side and contaminate the copper surface and thus disturb the surface finishing process. The pictures below shows a typical failure.
Vias and Chemical Nickel-Gold (ENIG)
Vias that are not completely covered or not properly filled with soldermask may create “skip pads” in the ENIG process.
Till now we didn”t receive any reasonable explanation from our material suppliers nor did we found one elsewhere that reveals the source of this problem. However supplier advise and long term experience guide us to two possible solutions to avoid the issue:
- Modify the layout so that all vias are open. Our engineers favour this solution. Sadly this is not always accepted by our customers or the design may not allow it.
- Apply the soldermask after the ENIG process. This is a costly solution as all copper surfaces are gold-plated and the soldermask adhesion becomes worse.
For closed via-holes we have developed an alternative solution which avoids chemicals getting trapped in the partially closed via-holes during developing of the soldermask or during application of the Ni/Au. Before the coating the entire panel with soldermask we selectively print soldermask into the via holes using a stencil. During a second print run we then cover the whole panel. This way the via-holes are completely filled with soldermask. An even layer of soldermask now covers the via-holes leaving no pockets to hold residual chemicals. We have used this technique for over 6 months, and it has proved successful in dramatically reducing the number of skip pad problems.
The following movies show this process of via filling and soldermask printing.
Setting up the machine:
Printing the soldermask into the via holes:
Result after filling the via holes:
Cover the panel with soldermask:
Result after printing the soldermask:
Drying the soldermask layer:
Eurocircuits”role in the project sets a new competitive standard
Making efficient pooling panels belongs to the core business of Eurocircuits. It is a necessity to ensure cost-effective production of prototypes or small batches.
Eurocircuits started as a trader of printed circuit boards in 1991. Soon after, in 1993 we got involved in production. It has been our aim from the start to use pooling techniques for a number of reasons :
- Save cost by increasing production efficiency
- Save the environment by reducing waste
The idea of making pooling panels was not new in 1993. On the Benelux market a dutch company was already successfully offering single sided boards in pooling since the eighties of the last century. For double sided boards however it was not that common yet.
When we introduced combination panels for double sided boards in our own production in Hungary there was a lot of resistance from the operators and from the production management. They saw the complexity of their job increase, and technological challenges had to be taken care of.
Now, almost 20 years later, most technology issues have been taken care of, except for one major area, the galvanic copper plating.
For this galvanic process, the design of the PCB plays a vital role in the outcome of the process. In pooling panels there is even an influence of the design of one board on the copper deposition on surrounding designs. That means that we have to be very careful how to build our panel layouts.
The restrictions in panel configuration create limitations that affect the efficiency in our production. As a producer you can look at this problem in two ways:
- Focus on efficiency and accept uneven copper distribution. Also accept that the quality of the PCB”s produced for one customer can be influenced by the design of another pcb on the same pooling panel.
- Focus on quality – stick to an even distribution and minimum copper plating thickness all over the panel. Accept that part of the panel surface gets lost because of extra copper areas and spacing introduced to balance out the galvanic layer. Also accept that not all jobs can be pooled with acceptable plating results.
Eurocircuits decided not to take any plating quality risks. We accepted the restrictions dictated by the plating process for a long time.The Elsyca Intellitool matrix copper plating is going to remove these restrictions.
Project partners :
Elsyca Intellitool plating – the concept
Elsyca Intellitool is a software controlled electroplating tooling concept developed by Elsyca. It reduces the pattern dependence of the deposited layer of copper on the boards. The main change from a standard plating cell is the introduction of a controllable grid ( matrix) of anode segments, at a small distance of the board to be plated.
The concept consists of 3 parts :
- 1.A simulation and optimisation tool which is a further development of Elsyca Smartplate, a software we use at Eurocircuits to simulate the plating process and to decide if a pooling panel is fit for production or not. The simulation tool optimizes the current on each anode segment in time to yield the desired plating thickness and uniformity on the board. The simulations counts with parameters like properties of the plating tank, design of the pcb, resisitivity of the substrate. The result of the optimization is sent to the control unit to feed the matrix.
- 2.The matrix feeder contains a microprocessor that reads the calculated pattern of the current, and controls a matrix of digital to anode converters (DACs). This imposes the correct current on each anode segment ( pin). An amplification of the current can be implemented.
- 3.The anode matrix, mounted on a printed circuit board. Each anode pin is connected to the matrix feeder.
Elsyca Intellitool is organising the anodes as a matrix with the same size as the panel to be plated, and every point in the matrix can plate with a different current. All individual currents can be controlled in time and intensity.This way the current density is not spread evenly over the panel, but is adjusted to the differences in copper distribution in the pcb design. This can be useful to balance differences in copper distribution within a single board, but gets even more interesting when there are different designs combined on one panel ( pooling-panel).
Elsyca Intellitool – in practice.
Eurocircuits is using the software from Elsyca to simulate plating (Smartplate) and judge the plating feasabilty of its pooling panels. Intellitool is going to take us a step further. We are not going to use the software just for making a judgment. The results of the simulations will be used to control the plating process by instructing each of the anodes in the matrix on the current to be used and the time to be plated.
The Elsyca Smartplate CAM output is sent directly from our UCAM Cam system to the plating line to control the process. Operator influence on the process will be eliminated.
Our plating process will be integrated in our production processes in a similar way as is now the case for CNC machines, test equipment, etc.
Elsyca Intellitool – labo test
To test the concept Elsyca made a labo plating setup. You can read an abstract of the concept and the labo test results
Elsyca Intellitool – testing in a production environment
Eurocircuits and Elsyca are testing the Elsyca Intellitool concept in a purpose built galvanic cell in our production site Eurocircuits Aachen Gmbh in Baesweiler, Germany.
The galvanic cell is built to treat one standard size Eurocircuits pooling panel ( 530 x 460 mm ) The PCB pattern on the pooling panel will vary from one production run to another.
The cell contains two anode arrays ( one for the front side, one for the backside of the pcb panel)
The tank is filled with MacDermid specialised chemicals for electroplating printed circuit boards, and the Eurocircuits pooling panel is precisely positioned between the two anode arrays.
Testing the Elsyca Intellitool production cell – November 17-2011
On November 17 tests with production panels taken out of regular production batches in Eurocircuits Aachen were plated in both our conventional plating line and in the Intellitool testcell.
Trials were conducted to evaluate the Intellitool concept as follows :
1. Test to improve the copper distribution on the panel against the conventional line :
2. Test to speed up the plating process with similar copper distribution as in the conventional line
Why lean production?
Our main target is reducing waste (time is a major waste) in the production and better (faster) serve our customers.
The first step – “clear the clouds”
We first needed to learn to see the real nature of our production processes. We learn to look through “lean glasses” to recognise the biggest waste items in our process. Waste can be waiting times between different processes, or stability problems in the process that create flow breakdowns.
Second step – list and analyse problems, set priorities
We formed a brainstorming team with colleagues from all areas in the company. The purpose of the sessions is to identify these areas in our process where we find important waste that can be cleared rather fast. We use Ishikawa root cause analysis for this.
During the brainstorming sessions we identified four areas where we think we can improve rapidly:
- Mechanical department
- Galvanic lines
- define KPI”s ( Key performance indicators)
- Priority settings
Creating a smooth production flow
When we have waves in our production this creates “traffic jams”. These jams are the main reason for delay. The best way to guarantee on-time delivery is by creating a smooth production flow. For that we need stable processes, a well balanced capacity distribution throughout the process, and skilled operators.
PCB production is a complicated process with a lot of different steps. Each order can be following a slightly different flow as different options are chosen. That makes is challenging to create a smooth flow. Most energy is spend in organizing the “human factor” – monitoring and motivating operators to think and act lean. Training is organised continually, and we try to involve people from all levels and all departments in the project.
New KPI”s (key performance indicators)
Existing KPI”s in the organisation are evaluated for their usefulness and following new KPI”s are introduced because we think they can inform us about our progress in this lean project.
- KPI for measuring the average throughput time (in hours)
- KPI”s measuring the efficiency in the galvanic process
- KPI for measuring the efficiency in the drilling department.
Beginning of October 2011 we started experimenting with a FIFO based system for setting priorities in each step of the production from the Blackhole PTH till the Soldermask curing step. As the first results are good we are now organizing to extend the reach of this FIFO method to the whole process of double sided production.
Controlled and decreased WIP (Work in Process)
We decreased and started to control the inventory of panels in production. Inventory is allowed only in clearly defined locations and up to a defined maximum number of panels. We produce in smaller lots based on the capacity of our bottleneck, the galvanic line. Jobs are started only for production when there is capacity available.
Panels waiting before the galvanic process before introduction of the WIP inventory control
Panels before the galvanic process with controlled inventory
As we are gaining more experience in the lean project, our confidence is growing that we can further increase efficiency and reliability. The knowledge built in the factory in Eger, Hungary will be useful when we start a new production unit in Gandhinagar India in 2012 to serve the Asian market with prototype pcb”s.